Dos Packet Driver For Mac

25.01.2020
    36 - Comments

SolVBE is a VESA VBE 1.2 driver for Windows XP (and Windows 2000) DOS boxes. It's main goal is to enable playing of old DOS games under windows (along with, for example, VDMSound), however, it works with most VESA 1.2. SolVBE is a VESA VBE 1.2 driver for Windows XP (and Windows 2000) DOS boxes. It's main goal is to enable playing of old DOS games under windows (along with, for example, VDMSound), however, it works with most VESA 1.2. The ending of the driver name has to be *.DOS, so for instance the driver of the 3com 3C574 PC-Card is called 'EL3C574.DOS'. How they work In the language of the NDIS architecture these drivers are called 'Media Access Control' (MAC) drivers. Packet drivers often have the letters 'PD' in their names, so the packet driver of a 3com 3C589 PC-Card is called '3C589PD.COM' and the driver of the D-Link DFE-670TXD PC-Card is called 'DFE670PD.COM'. Third, the batch files that Bobcat and Arachne use for dialing and packet driver loading require DOS 5.0 or later (Bobcat comes with some alternate batch files for DOS 3), though the programs themselves will work with DOS 3.3. Jan 01, 2018  Re: DOS 6.22 with network packet driver and TCP/IP CtrlC Jan 1, 2018 4:52 AM ( in response to Gwart ) I know this is an old post, but if you are still looking for help let me know as I have a ton of experience working with MajorTCP.

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//////////////////////////////////////////////////////////////////////
// //
// File name : packet_tx_driver.sv //
// Author : G. Andres Mancera //
// License : GNU Lesser General Public License //
// Course : System and Functional Verification Using UVM //
// UCSC Silicon Valley Extension //
// //
//////////////////////////////////////////////////////////////////////
`ifndefPACKET_TX_DRIVER__SV
`definePACKET_TX_DRIVER__SV
classpacket_tx_driverextendsuvm_driver#(packet);
virtual xge_mac_interface drv_vi;
`uvm_component_utils( packet_tx_driver )
functionnew(inputstring name='packet_tx_driver', inputuvm_component parent);
super.new(name, parent);
endfunction:new
virtualfunction voidbuild_phase(inputuvm_phase phase);
super.build_phase(phase);
uvm_config_db#(virtual xge_mac_interface)::get(this, '', 'drv_vi', drv_vi);
if ( drv_vinull )
`uvm_fatal(get_name(), 'Virtual Interface for driver not set!');
endfunction:build_phase
virtualtaskrun_phase(inputuvm_phase phase);
intunsigned pkt_len_in_bytes;
intunsigned num_of_flits;
bit [2:0] last_flit_mod;
bit [63:0] tx_data;
`uvm_info( get_name(), $sformatf('HIERARCHY: %m'), UVM_HIGH);
foreverbegin
seq_item_port.try_next_item( req );
if ( req null ) begin
// Send random idle
@(drv_vi.drv_cb);
drv_vi.drv_cb.pkt_tx_val <=1'b0;
drv_vi.drv_cb.pkt_tx_sop <=$urandom_range(1,0);
drv_vi.drv_cb.pkt_tx_eop <=$urandom_range(1,0);
drv_vi.drv_cb.pkt_tx_mod <=$urandom_range(7,0);
drv_vi.drv_cb.pkt_tx_data <={$urandom, $urandom_range(65535,0) };
end
elsebegin
`uvm_info( get_name(), $psprintf('Packet: n%0s', req.sprint()), UVM_HIGH)
pkt_len_in_bytes =6+6+2+ req.payload.size();
num_of_flits = ( pkt_len_in_bytes%8 ) ? pkt_len_in_bytes/8+1: pkt_len_in_bytes/8;
last_flit_mod = pkt_len_in_bytes%8;
`uvm_info( get_name(), $psprintf('pkt_len_in_bytes=%0d, num_of_flits=%0d, last_flit_mod=%0d',
pkt_len_in_bytes, num_of_flits, last_flit_mod), UVM_FULL)
for ( int i=0; i<num_of_flits; i++ ) begin
tx_data =64'h0;
@(drv_vi.drv_cb);
if ( i0 ) begin// -------------------------------- SOP cycle ----------------
tx_data ={ req.mac_dst_addr, req.mac_src_addr[47:32] };
drv_vi.drv_cb.pkt_tx_val <=1'b1;
drv_vi.drv_cb.pkt_tx_sop <= req.sop_mark;
drv_vi.drv_cb.pkt_tx_eop <=1'b0;
drv_vi.drv_cb.pkt_tx_mod <=$urandom_range(7,0);
drv_vi.drv_cb.pkt_tx_data <= tx_data;
end// -------------------------------- SOP cycle ----------------
elseif ( i(num_of_flits-1) ) begin// ---------------- EOP cycle ----------------
if ( num_of_flits2 ) begin
tx_data[63:16] ={ req.mac_src_addr[31:0], req.ether_type };
tx_data[15:0] =$urandom_range(16'hFFFF,0);
for ( int j=0; j<req.payload.size(); j++ ) begin
if ( j0 ) begin
tx_data[15:8] = req.payload[0];
end
elsebegin
tx_data[7:0] = req.payload[1];
end
end
end
elsebegin
for ( int j=0; j<8; j++ ) begin
if (j<(((req.payload.size()-3)%8)+1)) begin
tx_data = tx_data ( req.payload[8*i+j-14] << (56-8*j) );
end
elsebegin
tx_data = tx_data ( $urandom_range(8'hFF,0) << (56-8*j) );
end
end
end
drv_vi.drv_cb.pkt_tx_val <=1'b1;
drv_vi.drv_cb.pkt_tx_sop <=1'b0;
drv_vi.drv_cb.pkt_tx_eop <= req.eop_mark;
drv_vi.drv_cb.pkt_tx_mod <= last_flit_mod;
drv_vi.drv_cb.pkt_tx_data <= tx_data;
end// -------------------------------- EOP cycle ----------------
elsebegin// -------------------------------- MOP cycle ----------------
if ( i1 ) begin
tx_data ={ req.mac_src_addr[31:0], req.ether_type, req.payload[0], req.payload[1] };
end
elsebegin
for ( int j=0; j<8; j++ ) begin
tx_data = (tx_data<<8) req.payload[8*i+j-14];
end
end
drv_vi.drv_cb.pkt_tx_val <=1'b1;
drv_vi.drv_cb.pkt_tx_sop <=1'b0;
drv_vi.drv_cb.pkt_tx_eop <=1'b0;
drv_vi.drv_cb.pkt_tx_mod <=$urandom_range(0,7);
drv_vi.drv_cb.pkt_tx_data <= tx_data;
end// -------------------------------- MOP cycle ----------------
end
repeat ( req.ipg ) begin
@(drv_vi.drv_cb);
drv_vi.drv_cb.pkt_tx_val <=1'b0;
drv_vi.drv_cb.pkt_tx_sop <=$urandom_range(1,0);
drv_vi.drv_cb.pkt_tx_eop <=$urandom_range(1,0);
drv_vi.drv_cb.pkt_tx_mod <=$urandom_range(7,0);
drv_vi.drv_cb.pkt_tx_data <={$urandom, $urandom_range(65535,0) };
end
while ( drv_vi.drv_cb.pkt_tx_full ) begin
// When the pkt_tx_full signal is asserted, transfers should
// be suspended at the end of the current packet. Transfer of
// next packet can begin as soon as this signal is de-asserted.
@(drv_vi.drv_cb);
drv_vi.drv_cb.pkt_tx_val <=1'b0;
drv_vi.drv_cb.pkt_tx_sop <=$urandom_range(1,0);
drv_vi.drv_cb.pkt_tx_eop <=$urandom_range(1,0);
drv_vi.drv_cb.pkt_tx_mod <=$urandom_range(7,0);
drv_vi.drv_cb.pkt_tx_data <={$urandom, $urandom_range(65535,0) };
end
// Communicate item done to the sequencer
seq_item_port.item_done();
end
end
endtask:run_phase
endclass:packet_tx_driver
`endif// PACKET_TX_DRIVER__SV

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